Multi-level redistribution layers may be used to realize complex wirings in the fan-out wafer level ball grid array technology (also referred to as “WLB” technology). These multi-level redistribution layers may add significantly to the cost of the wafer level packaging technology. For example, to realize a spiral inductor over the fan-out region of a WLB package it may be necessary to connect the center electrode of the inductor by a lower or upper redistribution layer with respect to the redistribution layer where the main body of the spiral coil is realized. Also, any electrically isolated crossing in the redistribution layer over the fan-out region may have to be realized by one or more levels of redistribution layers.